@s(Edinburgh Regional Computing Centre) @h(SERC BSC TO LAB-B CONVERTOR BOX) @h(===============================) @s(Introduction) This document describes a @b("black-box") convertor that enables the connection of IBM mainframes running the SERC X25 software on VM to connect to standard X25 hardware. The requirement arises because a number of such systems in the SERC and University communities are unable to support HDLC framed synchronous communications lines. @s(The Protocols) The black box has two V24 synchronous communications ports. One of these operate to the LAP-B protocol as specified in part 2 of the PSS technical user guide. The other operates to the BSC based link level protocol described in the document @b("Protocols in the SERC/NERC Network", Issue No.6, 8th March 1982.) The convertor passes the X25 level 3 contents of the level 2 frames transparently. In particular no reblocking of data is undertaken, and the maximum frame size on each side of the convertor must be compatible if problems with the X25 "more data" but are to be avoided. @s(Throughout and Delay) The convertor drives 9.6k baud lines on each side; 19.2k baud operation may be possible. Packets are fully buffered within the convertor, so the minimum delay is the packet size divided by the line speed. The BSC link is half duplex, while LAP-B is full duplex. It is therefore not possible to specify a maximum delay, which is determined largely by the traffic patterns, but it is not expected that the convertor will add significantly to the delay inherent in the protocol mismatch. Since the convertor is unaware of the relative priorities of the packets it is sending and receiving, it can only schedule the turnround of the half duplex line in a rather naive way. The convertor has 4k bytes of buffer store, and is therefore be able to completely buffer all data possible within the LAP-B flow control window given a maximum packet size of 256 bytes. @s(Hardware) The hardware is be based on an Intel single-board computer, the IBSC 88/45, which uses the INTEL 8088 processor. The board is mounted in a standard enclosure with power supplies. Some minor engineering is necessary to fit V24 sockets, a DIP-switch pack, diagnostic lights, and if necessary a barrier circuit. The external interface is V24, with the option of linking the receive and transmit timing clocks to avoid the need for extra modems or modem eliminators. @s(Software) The software is written in C and Intel Assembler. language. @s(Options) The only options will be: DTE/DCE selection for LAP-B DTE/DCE selection for BSC Common clocking for both ports @s(Documentation) The systems are provided with appropriate documentation. The options are selected by DIP switches on the convertor box. @s(Restrictions) The convertor is intended to convey only SERC X25 level 3. No guarantee is given that it will perform satisfactorily for other protocols. The maximum packet size is 256 bytes of data, i.e. excluding from this count the HDLC flags, address and control bytes, the frame check sequence bytes, and any transparency bits which will be stripped and inserted. The packet length must be a multiple of 8-bit bytes. @s(Loading Software) The software is in EPROM. No load device or down-line load facilities are required. @s(Status and Management Information) A V24 asynchronous printer port is provided, and used to print status and traffic data, as well as diagnostic output from the self-test procedures invoked at startup or reset. However, it is not expected that a terminal will be permanently connected. @s(Hardware Maintenance) No routine maintenance is required. Fault repair is done on a unit replacement basis. A stock of spare systems will be kept at a convenient central location. The systems are constructed throughout from standard manufacturers' boards, and are repaired by returning to the manufacturer. It is likely that this product will share common hardware with that used by a major computer manufacturer. If so ERCC will investigate the possibilities of arranging a maintenance agreement. @s(Software Maintenance) The software is maintained free of charge for six months from acceptance of the first system. After that, corrections or changes will be done on a @b("time and materials") basis. @s(Unit Cost) Unit Cost ... ... ... ... ... ... #3,250/unit