%ELEMENTDEF I8086(%INPUT RESET,READY,CLK,NMI,MX,TEST,XGND,GT0,GT1,INTR,&
  %INOUTARRAY AD(0:15),%OUTPUT BHE,%OUTPUTARRAY S(0:2))
%ELEMENTDEF I8284(%INPUT RES,AEN1,AEN2,RDY1,RDY2,CSYNC,FC, &
  %OUTPUT READY,CLK,PCLK,OSC,RESET,%INOUT X1,X2)
%ELEMENTDEF I8288(%INPUT CLK,AEN,CEN,IOB,%INPUTARRAY S(0:2), &
  %OUTPUT ALE,DEN,DTR,AIOWC,IORC,AMWC,MRDC,INTA)
%ELEMENTDEF I8259(%INPUT CS,RD,WR,INTA,A0,%INPUTARRAY IR(0:7), &
  %OUTPUT INT,EN,%INOUTARRAY D(0:7))
%ELEMENTDEF I8282(%INPUT STB,OE,%INPUTARRAY DI(0:7), &
  %OUTPUTARRAY DO(0:7))
%ELEMENTDEF I8286(%INPUT T,OE,%INOUTARRAY A,B(0:7))
%ELEMENTDEF I2616(%INPUT CE,OE,VPP,%INPUTARRAY A(0:10), &
  %OUTPUTARRAY O(0:7))
%ELEMENTDEF I2142(%INPUT CS1,CS2,WE,OD,%INPUTARRAY A(0:9), &
  %INOUTARRAY IO(1:4))
%ELEMENTDEF I8205(%INPUT E1,E2,E3,A0,A1,A2,%OUTPUTARRAY O(0:7))
%ELEMENTDEF I8251(%INPUT CLK,RESET,CD,WR,RD,CS,TXC,RXC,CTS,RXD, &
  %INPUTARRAY D(0:7),%OUTPUT TXD)
%ELEMENTDEF LDRIV(%INPUT A,B,C,D,VP12,VM12,%OUTPUT Y)
%ELEMENTDEF LREC(%INPUT EIA,MILP,MILM,HYST,STR,%OUTPUT Y)
%ELEMENTDEF DFF(%INPUT CLK,D,PR,CLR,%OUTPUT Q,QB)
%ELEMENTDEF NAND2(%INPUT A,B,%OUTPUT Y)
%ELEMENTDEF INV(%INPUT A,%OUTPUT Y)
%ELEMENTDEF T7490(%INPUT IA,IB,R01,R02,R91,R92,%OUTPUT OA,OB,OC,OD)
%ELEMENTDEF T7493(%INPUT IA,IB,R01,R02,%OUTPUT OA,OB,OC,OD)
%ELEMENTDEF R1K(%OUTPUT Y)
%ELEMENTDEF CRYSTAL(%INOUT X1,X2)
%ELEMENTDEF R560K(%INPUT A,%OUTPUT Y)
%ELEMENTDEF D1N914(%INPUT A,%OUTPUT Y)
%ELEMENTDEF C1UF(%INPUT A,%OUTPUT Y)
%ELEMENTDEF SELECTOR(%INPUTARRAY I(1:8),%OUTPUT O)

%ASSEMBLYDEF MAXSYS(%INPUT RES,CRTREC,VP12,VM12,%INPUTARRAY IR(0:7), &
  %OUTPUT CRTXMIT,BHE,%OUTPUTARRAY A(0:14),%INOUTARRAY D(0:15))
%ELEMENT(I8086) CPU
%ELEMENT(I8284) CLOCK
%ELEMENT(I8288) BUSC
%ELEMENT(I8259) INTC
%ELEMENT(I8282) ALATL,ALATH
%ELEMENT(I8286) BBUFL,BBUFH
%ELEMENT(I2616) ROM99,ROM100
%ELEMENT(I2142)%ARRAY RAM(0:3)
%ELEMENT(I8205) DEC1,DEC2
%ELEMENT(I8251) CRTC
%ELEMENT(LREC) REC
%ELEMENT(LDRIV) XMIT
%ELEMENT(NAND2) N1,N2,N3,N4,N5,N6
%ELEMENT(INV) I1,I2,I3,I4,I5,I6
%ELEMENT(DFF) D1,D2,D3,D4
%ELEMENT(T7490) DIV10
%ELEMENT(T7493) DIV2
%ELEMENT(R1K)%ARRAY R(1:20)
%ELEMENT(SELECTOR) CRTRATE
%ELEMENT(CRYSTAL) CRYS12M
%ELEMENT(R560K) RESR
%ELEMENT(D1N914) RESD
%ELEMENT(C1UF) RESC
  %FOR I=0,1,7 %DO [ IR(I)->INTC.IR(I) ]
  ALATH.DO(7)->BHE
  %FOR I=0,1,6 %DO [ ALATH.DO(I)->A(I+8) ]
  %FOR I=0,1,7 %DO [ ALATL.DO(I)->A(I)
                     D(I)->BBUFL.B(I)
                     D(I+8)->BBUFH.B(I) ]
  CRYS12M.X1->CLOCK.X1
  CRYS12M.X2->CLOCK.X2
  %GND->CLOCK.FC
  RES,RESD.Y,RESR.Y,RESC.Y->CLOCK.RES
  %VCC->RESD.A,RESR.A
  %GND->RESC.A
  CLOCK.RESET->CPU.RESET,CRTC.RESET
  CLOCK.READY->CPU.READY
  CLOCK.CLK->CPU.CLK,BUSC.CLK,D1.CLK,I4.A
  %GND->CLOCK.CSYNC,CLOCK.AEN1,CLOCK.RDY2
  R(1).Y->CLOCK.AEN2
  CLOCK.OSC->DIV10.IA
  CLOCK.PCLK->CRTC.CLK
  CPU.BHE->ALATH.DI(7)
  CPU.AD(15)->BBUFH.A(7)
  %FOR I=0,1,6 %DO [ CPU.AD(I+8)->ALATH.DI(I),BBUFH.A(I) ]
  %FOR I=0,1,7 %DO [ CPU.AD(I)->ALATL.DI(I),BBUFL.A(I),INTC.D(I) ]
  INTC.INT->CPU.INTR
  %FOR I=0,1,2 %DO [ CPU.S(I)->BUSC.S(I) ]
  R(2).Y->CPU.GT0
  R(19).Y->CPU.GT1
  %GND->CPU.NMI,CPU.MX,CPU.TEST,CPU.XGND
  BUSC.ALE->ALATH.STB,ALATL.STB,I2.A
  BUSC.DTR->BBUFH.T,BBUFL.T
  BUSC.DEN->N1.B
  BUSC.INTA->INTC.INTA
  BUSC.IORC->INTC.RD,CRTC.RD
  BUSC.AIOWC->INTC.WR,CRTC.WR
  BUSC.MRDC->ROM99.OE,ROM100.OE,D4.CLK
  %FOR I=0,1,3 %DO [ BUSC.MRDC->RAM(I).OD ]
  %FOR I=0,1,3 %DO [ BUSC.AMWC->RAM(I).WE ]
  %GND->BUSC.IOB,BUSC.AEN
  R(3).Y->BUSC.CEN
  INTC.EN->N1.A
  N1.Y->BBUFL.OE,BBUFH.OE
  %GND->ALATL.OE,ALATH.OE
  ALATH.DO(7)->RAM(2).CS1,RAM(3).CS1
  ALATH.DO(6)->DEC1.A1,DEC1.A2
  ALATH.DO(4)->DEC1.A0
  %FOR I=0,1,3 %DO [ ALATH.DO(I)->ROM99.A(I+7),ROM100.A(I+7) ]
  %FOR I=0,1,2 %DO [ 
    %FOR J=0,1,3 %DO [ ALATH.DO(I)->RAM(J).A(I+7) ] ]
  %FOR I=1,1,7 %DO [ ALATL.DO(I)->ROM99.A(I-1),ROM100.A(I-1)
    %FOR J=0,1,3 %DO [ ALATL.DO(I)->RAM(J).A(I-1) ] ]
  ALATL.DO(0)->RAM(0).CS1,RAM(1).CS1
  ALATL.DO(1)->INTC.A0
  %FOR I=0,1,3 %DO [
    ROM99.O(I)->BBUFL.B(I),RAM(0).IO(4-I)
    ROM99.O(I+4)->BBUFL.B(I+4),RAM(1).IO(4-I)
    ROM100.O(I)->BBUFH.B(I),RAM(2).IO(4-I)
    ROM100.O(I+4)->BBUFH.B(I+4),RAM(3).IO(4-I)
    BBUFH.B(I)->CRTC.D(I)
    BBUFH.B(I+4)->CRTC.D(I+4) ]
  DEC2.O(0)->INTC.CS
  %FOR I=0,1,3 %DO [ N2.Y->RAM(I).CS2 ]
  I1.Y->ROM99.CE,ROM100.CE,N4.B
  D4.Q->DEC1.E1
  %GND->DEC1.E2
  R(4).Y->DEC1.E3
  %GND->DEC2.E1
  DEC1.O(0)->N3.A
  DEC1.O(1)->N2.A
  %FOR I=2,1,6 %DO [ DEC1.O(I)->%N ]
  DEC1.O(7)->N3.B
  R(5).Y->N2.B
  N3.Y->I1.A
  ALATL.DO(5)->DEC2.A0
  ALATL.DO(6)->DEC2.A1
  ALATL.DO(7)->DEC2.A2
  %GND->DEC2.E2
  R(6).Y->DEC2.E3
  DEC2.O(1)->CRTC.CS,N4.A
  %FOR I=2,1,7 %DO [ DEC2.O(I)->%N ]
  ALATL.DO(1)->CRTC.CD
  REC.Y->CRTC.RXD
  CRTREC->REC.EIA
  %GND->REC.MILP,REC.MILM,REC.HYST
  R(20).Y->REC.STR
  %GND->CRTC.CTS
  CRTC.TXD->XMIT.A,XMIT.B,XMIT.C,XMIT.D
  XMIT.Y->CRTXMIT
  VP12->XMIT.VP12
  VM12->XMIT.VM12
  CRTRATE.O->CRTC.TXC,CRTC.RXC
  DIV10.OA->DIV10.IB
  DIV10.OD->DIV2.IA
  DIV10.OB,DIV10.OC->%N
  R(7).Y->DIV10.R01
  R(8).Y->DIV10.R02
  R(9).Y->DIV10.R91
  R(10).Y->DIV10.R92
  DIV2.OA->DIV2.IB,CRTRATE.I(1)
  DIV2.OB->CRTRATE.I(2)
  DIV2.OC->CRTRATE.I(3)
  DIV2.OD->CRTRATE.I(4)
  %FOR I=5,1,8 %DO [ %N->CRTRATE.I(I) ]
  R(11).Y->DIV2.R01
  R(12).Y->DIV2.R02
  N4.Y->N5.A,I3.A
  I3.Y->D1.D
  D2.Q->N5.B
  N5.Y->CLOCK.RDY1
  I2.Y->D1.PR,D2.PR,I5.A
  D1.Q->D2.D
  R(13).Y->D1.CLR
  R(14).Y->D2.CLR
  I4.Y->D2.CLK,I6.A,N6.B
  D1.QB->%N
  D2.QB->%N
  I5.Y->D3.D
  I6.Y->D3.CLK
  R(15).Y->D3.PR
  R(16).Y->D3.CLR
  D3.Q->N6.A
  D3.QB->%N
  N6.Y->D4.CLR
  R(17).Y->D4.PR
  R(18).Y->D4.D
  D4.QB->%N
  %VCC->ROM99.VPP,ROM100.VPP
%ENDDEF

%CHIPDEF I8086(%ELEMENT(I8086) C)=%GND,C.AD(14),C.AD(13),C.AD(12), &
  C.AD(11),C.AD(10),C.AD(9),C.AD(8),C.AD(7),C.AD(6),C.AD(5),C.AD(4), &
  C.AD(3),C.AD(2),C.AD(1),C.AD(0),C.NMI,C.INTR,C.CLK,C.XGND,C.RESET, &
  C.READY,C.TEST,%N,%N,C.S(0),C.S(1),C.S(2),%N,C.GT1,C.GT0,%N,C.MX, &
  C.BHE,%N,%N,%N,%N,C.AD(15),%VCC

%CHIPDEF I8284(%ELEMENT(I8284) C)=C.CSYNC,C.PCLK,C.AEN1,C.RDY1,C.READY,&
  C.RDY2,C.AEN2,C.CLK,%GND,C.RESET,C.RES,C.OSC,C.FC,%N,%N,C.X1,C.X2,%VCC

%CHIPDEF I8288(%ELEMENT(I8288) B)=B.IOB,B.CLK,B.S(1),B.DTR,B.ALE, &
  B.AEN,B.MRDC,B.AMWC,%N,%GND,%N,B.AIOWC,B.IORC,B.INTA,B.CEN,B.DEN, &
  %N,B.S(2),B.S(0),%VCC

%CHIPDEF I8282(%ELEMENT(I8282) A)=A.DI(0),A.DI(1),A.DI(2),A.DI(3), &
  A.DI(4),A.DI(5),A.DI(6),A.DI(7),A.OE,%GND,A.STB,A.DO(7),A.DO(6), &
  A.DO(5),A.DO(4),A.DO(3),A.DO(2),A.DO(1),A.DO(0),%VCC

%CHIPDEF I8286(%ELEMENT(I8286) B)=B.A(0),B.A(1),B.A(2),B.A(3),B.A(4), &
  B.A(5),B.A(6),B.A(7),B.OE,%GND,B.T,B.B(7),B.B(6),B.B(5),B.B(4), &
  B.B(3),B.B(2),B.B(1),B.B(0),%VCC

%CHIPDEF I2616(%ELEMENT(I2616) R)=R.A(7),R.A(6),R.A(5),R.A(4),R.A(3), &
  R.A(2),R.A(1),R.A(0),R.O(0),R.O(1),R.O(2),%GND,R.O(3),R.O(4),R.O(5), &
  R.O(6),R.O(7),R.CE,R.A(10),R.OE,R.VPP,R.A(9),R.A(8),%VCC

%CHIPDEF I2142(%ELEMENT(I2142) R)=R.A(6),R.A(5),R.A(4),R.A(3),R.CS2, &
  R.A(0),R.A(1),R.A(2),R.CS1,%GND,R.WE,R.IO(4),R.IO(3),R.IO(2),R.IO(1),&
  R.OD,R.A(9),R.A(8),R.A(7),%VCC

%CHIPDEF I8205(%ELEMENT(I8205) D)=D.A0,D.A1,D.A2,D.E1,D.E2,D.E3, &
  D.O(7),%GND,D.O(6),D.O(5),D.O(4),D.O(3),D.O(2),D.O(1),D.O(0),%VCC

%CHIPDEF I8251(%ELEMENT(I8251) C)=C.D(2),C.D(3),C.RXD,%GND,C.D(4), &
  C.D(5),C.D(6),C.D(7),C.TXC,C.WR,C.CS,C.CD,C.RD,%N,%N,%N,C.CTS,%N, &
  C.TXD,C.CLK,C.RESET,%N,%N,%N,C.RXC,%VCC,C.D(0),C.D(1)

%CHIPDEF S8T15(%ELEMENT(LDRIV) D1,D2)=D1.A,D1.B,D1.C,D1.D,D1.Y,%N, &
  %GND,(D1.VM12,D2.VM12),D2.Y,D2.D,D2.C,D2.B,D2.A,(D1.VP12,D2.VP12)

%CHIPDEF S8T16(%ELEMENT(LREC) R1,R2)=R1.MILM,R1.Y,R1.STR,R1.HYST, &
  R1.MILP,R1.EIA,%GND,R2.MILM,R2.EIA,R2.MILP,R2.HYST,R2.STR,R2.Y,%VCC

%CHIPDEF I8259(%ELEMENT(I8259) I)=I.CS,I.WR,I.RD,I.D(7),I.D(6),I.D(5), &
  I.D(4),I.D(3),I.D(2),I.D(1),I.D(0),%N,%N,%GND,%N,I.EN,I.INT,I.IR(0), &
  I.IR(1),I.IR(2),I.IR(3),I.IR(4),I.IR(5),I.IR(6),I.IR(7),I.INTA, &
  I.A0,%VCC

%CHIPDEF T7400(%ELEMENT(NAND2) N1,N2,N3,N4)=N1.A,N1.B,N1.Y,N2.A,N2.B, &
  N2.Y,%GND,N3.Y,N3.A,N3.B,N4.Y,N4.A,N4.B,%VCC

%CHIPDEF T7404(%ELEMENT(INV) I1,I2,I3,I4,I5,I6)=I1.A,I1.Y,I2.A,I2.Y, &
  I3.A,I3.Y,%GND,I4.Y,I4.A,I5.Y,I5.A,I6.Y,I6.A,%VCC

%CHIPDEF T7474(%ELEMENT(DFF) D1,D2)=D1.CLR,D1.D,D1.CLK,D1.PR,D1.Q, &
  D1.QB,%GND,D2.QB,D2.Q,D2.PR,D2.CLK,D2.D,D2.CLR,%VCC

%CHIPDEF T7490(%ELEMENT(T7490) D)=D.IB,D.R01,D.R02,%N,%VCC,D.R91, &
  D.R92,D.OC,D.OB,%GND,D.OD,D.OA,%N,D.IA

%CHIPDEF T7493(%ELEMENT(T7493) D)=D.IB,D.R01,D.R02,%N,%VCC,%N,%N,D.OC, &
  D.OB,%GND,D.OD,D.OA,%N,D.IA

%CHIPDEF SELECTOR(%ELEMENT(SELECTOR) S)=S.O,%N,%N,%N,%N,%N,%N,%N, &
  S.I(8),S.I(7),S.I(6),S.I(5),S.I(4),S.I(3),S.I(2),S.I(1)

%CHIPDEF R1K15(%ELEMENT(R1K)%ARRAY R(1:15))=R(1).Y,R(2).Y,R(3).Y, &
  R(4).Y,R(5).Y,R(6).Y,R(7).Y,R(8).Y,R(9).Y,R(10).Y,R(11).Y,R(12).Y, &
  R(13).Y,R(14).Y,R(15).Y,%VCC

%CHIPDEF RESCAR(%ELEMENT(R560K) R,%ELEMENT(D1N914) D,%ELEMENT(C1UF) C)=&
  D.Y,%N,%N,R.Y,%N,%N,C.Y,C.A,%N,%N,R.A,%N,%N,D.A

%CHIPDEF CRYSCAR(%ELEMENT(CRYSTAL) C)=C.X1,%N,%N,%N,%N,%N,%N,%N, &
  %N,%N,%N,%N,%N,%N,%N,C.X2

%BOARDDEF CSD083(%CHIPARRAY C(1:8,1:7/'ABCDEFG'),%EDGEARRAY A1,A2, &
  B1,B2(1:18/'ABCDEFHJKLMNPRSTUV'))<-%ASSEMBLY(MAXSYS)
  C(5,1)<-%CHIP(I8086)<-CPU
  C(7,2)<-%CHIP(I8284)<-CLOCK
  C(6,1)<-%CHIP(I8288)<-BUSC
  C(2,1)<-%CHIP(I8282)<-ALATL
  C(4,1)<-%CHIP(I8282)<-ALATH
  C(1,1)<-%CHIP(I8286)<-BBUFL
  C(3,1)<-%CHIP(I8286)<-BBUFH
  C(1,3)<-%CHIP(I2616)<-ROM99
  C(3,3)<-%CHIP(I2616)<-ROM100
  %FOR I=0,1,3 %DO [ C(I+1,5)<-%CHIP(I2142)<-RAM(I) ]
  C(6,5)<-%CHIP(I8205)<-DEC1
  C(6,6)<-%CHIP(I8205)<-DEC2
  C(5,6)<-%CHIP(I8251)<-CRTC
  C(5,4)<-%CHIP(I8259)<-INTC
  C(6,4)<-%CHIP(T7400)<-N2,N3,N1,%N
  C(7,1)<-%CHIP(RESCAR)<-RESR,RESD,RESC
  C(8,2)<-%CHIP(CRYSCAR)<-CRYS12M
  C(6,3)<-%CHIP(R1K15)<-R(1),R(2),R(3),R(4),R(5),R(13),R(14), &
                         R(19),R(20),%N,%N,%N,%N,%N,%N
  C(8,6)<-%CHIP(R1K15)<-R(6),R(7),R(8),R(9),R(10),R(11),R(12), &
                         R(15),R(16),R(17),R(18),%N,%N,%N,%N
  C(8,1)<-%CHIP(S8T15)<-XMIT,%N
  C(8,3)<-%CHIP(S8T16)<-REC,%N
  C(7,5)<-%CHIP(T7490)<-DIV10
  C(7,6)<-%CHIP(T7493)<-DIV2
  C(7,7)<-%CHIP(SELECTOR)<-CRTRATE
  C(8,4)<-%CHIP(T7474)<-D1,D2
  C(8,7)<-%CHIP(T7474)<-D3,D4
  C(8,5)<-%CHIP(T7400)<-N4,N5,N6,%N
  C(7,4)<-%CHIP(T7404)<-I2,I4,I3,I1,I5,I6
! EDGE CONNECTIONS
  %FOR I=0,1,14 %DO [ A1(I+1)<-A(I) ]
  %FOR I=0,1,13 %DO [ A2(I+5)<-D(I) ]
  A1(17)<-D(14)
  A1(18)<-D(15)
  B1(6)<-BHE
  B1(7)<-RES
  %FOR I=0,1,7 %DO [ B2(I+5)<-IR(I) ]
  B1(17)<-VM12
  B1(18)<-VP12
  B2(17)<-CRTREC
  B2(18)<-CRTXMIT
%ENDDEF
%END