nator)
    curlab = curlab+2
    get STATEMENTS(keyfinish)
    curlab = curlab-2
    -> initial(keyend) %if atom = keyend
  %finish
  -> term

initial(keycycle):
  this is inst
  %if a(terminator) %start
    define label(curlab)
    get LOOP BODY
    -> initial(keyend) %if atom = keyend
    get CONDITION %if a(keyuntil)
    putact(repeat,curlab,0)
    -> term
  %finish
  nonstandard(22)
  get FOR CLAUSE
  -> for1
initial(keywhile):
  this is inst
  define label(curlab)
  get CONDITION
  get(keycycle)
  get(}
      Dm (5, 21);             { Diffusion to metal contact for VDD }
      Layer (Metal) ; Width (4);
      GNDwireX (0, 0, 10);
      VDDwireX (0, 19, 10);
      Layer (Diffusion);
      WireX (6, 8, 4);        { Output line }
   EndSymbol;

   Symbol ('pass transistor');
      Etdx ('PT', 2, 8, 2);   { the pass transistor }
      Layer (Metal) ; Width (4);
      GNDwireX (0, 0, 6);
      VDDwireX (0, 19, 6);
      Layer (Poly);
      WireY (2, 0, 26);       { Clock line }
   EndSymbol;

   Symbol ('interface cell');
      Pdbw (3, 9);
      Layer (Poly);
      WireX (2, 5, 4);
      Layer (Metal) ; Width (4);
      GNDwireX (0, 0, 6);
      VDDwireX (0, 19, 6);
   EndSymbol;

   Symbol ('shift cell');
      Draw ('inverter', 0, 0);
      Draw ('pass transistor', Sx ('inverter'), 0);
      Draw ('interface cell', Sx ('inverter') + Sx ('pass transistor'), 0);
   EndSymbol;

   Symbol ('shift register');
      For i := 1 To Num_Cells Do Begin
         Draw ('shift cell', Sx ('shift cell') * (i-1), 0);
      End;
   EndSymbol;

   Finish;
End.