@Section(OVERVIEW)
The first part of this chapter will describe the user interface of the
microcoded graphics interpreter (arguments and data structure, environment,
instruction format,...)

ILAP (a procedure library), CIFVIEW, TED, SPICE, ESDL,... are all VLSI design
tools available on APM.  As ILAP, TED, CIFVIEW, and some of the others 
design tools are completely described in Departmental manual and User's guide,
the software tool section will only provide information on how to get through
to this packages on the APM.  ESDL is the only tool that will slightly be
described.

@NewPage
@Section(MICROCODED GRAPHICS INTERPRETER)

This  sections describes a simple universal interface between the applications
programs, system utilities and user interface modules on one side and the
graphics support component of the system on the other.  Such structured
hierarchical graphics interface should fit easily into a variety of
applications through supporting structured hierarchical dependencies of
workspaces for the individual applications while presenting a manageable and
uniform front to the graphics support subsystem.  Several similar approaches
have been suggested in [Foley 82] and [Lantz 84] but with a limited number of
practical implementation examples and less emphasis on their applications to
general interactive computing environment.  Recently, work has been started on
defining a standard for a similar type of interface:  Programmer's Hierachical
Interactive Graphics Standard (PHIGS).

The interface is a directed graph, residing in the main system memory where
client processes in the system can manipulate their own allocated sections on
one side and a separate evaluation process caters for the creations of the
resulting images on the other as shown in a paraphrase of a windowing system
below.  In other words, the evaluation process can be viewed as a function
taking the graph as an argument and producing the image as a value.

The top part of the graph is usually under the supervision of the system
window manager, while its exit edges provide linkage to applications subgraphs
running within their allocated subwindows.  Such hierarchy may reoccur
recursively where an application may have its own subwindow manager
maintaining its menu, workspace and other areas of activity.

The image is computed through a depth-first scan of the descriptor structure,
where for each of the nodes, its local evaluation environmnent is saved, prior
to following any of the downwards edges and subsequently restored on return. 
The ordering of the exit edges defines the eventual overlap of the graphical
objects created by their execution.  Evaluation is terminated after the
execution along the last vertical edge of the node, at which it was invoked,
thus allowing nested invokation of selected substructures.

The speed of generating new images is strongly dependent on the complexity of
the graph and on whether the evaluation process has to share the processor
with other processes, or it can have its own customised evaluation engine. 
Depending on certain properties of the graph, like being acyclic or even a
tree, various optimisation techniques allow for only parts of the graph to be
scanned, still yielding a valid picture.

@subsection(Graph construction)

The graph is constucted out of fixed-format nodes with two exit edges: a
vertical and a horizontal one.  The vertical edge is used to represent image
hierarchy and the horizontal edge supports linkage of multiple image components
at the same level of hierarchy.

Leaf nodes in such a directed binary graph i.e. those with  no vertical exit
edges are generally responsible for the final drawing operations, and they can
involve operations like filling a polygon, drawing a straight line, drawing a
string of characters etc.  These are executed with the necessary current
environmental attributes like: colour, font, scaling, clip boundaries ect. 
Some of the drawing operations cna have impact on the environment, like
deposition of character strings moves the working coordinates along the string
baseline.  Non-leaf nodes are generally responsible for the  composition of
the picture out of subordinate ones as well as for the necessary modifications
of the environment, like coordinate manipulations, colour and font selection
etc.  Some of these operations, like moving or scaling are cummulative along
the vertical paths in the graph; others like font or colour selection are
nested.  There are also some genreral control nodes, which allow the user to
exercise control over the evaluation process.


@Paragraph(Format of the node)

Each binary node consists of 11 consecutive 16-bit half-words, where the first
tow bytes contain the instruction code and the execution flags of the node. 
They are followed by a long-word of argument field, and then two long-words,
where on exit, the evaluation process deposits the relative dimensions of the
bounding box for the image subordinate to the node.  These dimensions are
relative to the environmental working (workX,workY) coordinates on the entry
to the node.  The argument field can contain a 32-bit pointer, two 16-bit
geometrical or indexing arguments, or for some single-argument operations only
the first half-word is taken into account.  The last two long-words contain
downwords and rightwards pointers of the exit edges, with execution flags
Down and Right indicating their validity.  Flat pointer when 1 represents
indirection in fetching of arguments.

We will describe further details of the nodes while presenting a number of
example applications.  In all illustrations, nodes will be denoted with their
associated opcodes and those of the flags, which are set to 1.  Values of 1
for the Down and Right flags are indicated by the presence of the
corresponding exit edges.

@Paragraph(Example 1:  A leaf cell editor for VLSI design)

VLSI design systems are geared towards the management of complex, integrated
circuit designs.  By the end of this decade, using available technology, Mead
[Mead 80] compares the design of integrated circuits with the complex task of
designing an urban density road network the size oa an entrire continent.  The
scope for error in such a project, if no proper tools are available, is
immense.  Current fabrication technology also imposes a constraint on the
number of iterations designers can make to their circuit layouts as financial
expenditure increases on each iteration.

Management is currently handled by a process of abstraction, i.e. of
hierarchical structuring of the chip design into manageable "cells."  Each cell
can in turn be individually created with geometric design rule checking
applied at each separate stage.  A composition tool, either graphic or
textual, is then applied to put together individually designed cells and form
the overall design.

[Gray 79], [Buchanan 80], [Whitney 81], [Rees 83] have proposed a methodology
of circuit design based on such a hierarchical approach.  Recognising that
there is a striking similarity between structured programming techniques and
VLSI design, we can apply the ideas of MODULARITY, (the partition of the
design into manageable "cells" with well defined functions and interfaces),
HIERARCHY, (where modularity extends over partitioned levels of the design),
and ITERATION (the repetition of basic modules in both one and two
dimensions).  Using this design methodology, the complete design is created
from a "top down" partition and a "bottom up" integration, with verification
and simulation applied at various levels of the layout.

CAD may play an important role at all levels of the hierarchy, from
composition tools at root nodes of the design system down to "leaf cell"
graphics editors.  In this section, we provide a short presentation of an
editor for structured design of  VLSI leaf cells which has been created around
the experimental graphics interface being presented in this paper.  The editor
is a component of a major design [Rees 83] which comprises a high level
composition language, on-line geometric design rule checking and automatic
stretching and compaction of composition cells.  We outline some of the
capabilities of the editor, with particular emphasis on the ease with which we
can produce a leaf cell circuit design when tools such as the appropriate
representing data structure and its efficient interpreter are available.

@b[Editor design environment]

There are certain features of a circuit design environment which are
fundamental to the user.  It must exhibit: fast interactive response, the
ability to view the design at arbitrary geometric scales (window management
and multiple view ports) together with a clean and comprehensive user
interface.  The designer should feel intimately coupled to his design
environment, with both control and the ability to perform structured
operations such as viewing, panning and zooming at the touch of a button.

The editor is menu driven, and uses a mouse as the manipulating device.  The
mouse is used for pointing and editing individual objects on the screen, or as
an area selector where whole groups of objects are operated upon.  The menu
consists of representations of components the designer can paint with (wires,
transistors, contacts) together with a set of high level functions (view,
move, clone, input, ouput etc.) which he can use to operate upon and  compose
design layouts.

While operating within its own allocated window, the editor is a multiwindow
sytem in itself, with one menu and potentially more than one workspace
subwindow.

@b[Building blocks]

The basic VLSI building blocks are wires, transistors and contacts.  Using
these primitive components it is possible to construct very large scale
circuit designs.

Wires are conventionally denoted as occupying certain "layers" on the silicon.
For simple example of NMOS technology, these layers are polysilicon, diffusion
and meta.  Simple VLSI constructs, like transistors or contacts are overlaps
of the approriately sized and positioned "technological" boxes.  Using these
objects more complex units such as the "RAM cell" presented in the
illustration can be constructed.

The fabrication process, however, still deals with a "flattened" design, and
during fabrication objects such as contacts and transistors lose their
hierarchical structure and become merely "etchings" carved out of the
individual layers on the silicon wafer.

The colours selected are conventional circuit design, and the video planes
correspond directly with mask layers for separate technological phases of the
circuit production process.

@B[Simple structures]

There are two basic subwindows in the editor workspace area: one containing
the menu, and the other providing the design workspace.  The menu is a
horizontally linked structure of menu items, where graphical symbols are
hierarchical structures themselves allowing for rotation, changes of
technological layers and dimensions of objects prior to planting them into the
design.  The workspace can contain several subwindows, each offering an
indepenently controlled  viewport into the design.  

Node Move(X,Y) modifies
current environmental working coordinates bu (X,Y), prior to passing them down
the vertical edge.  Nodes Box(X,Y) and Line(X,Y) draw a box and a line of size
(X<Y) respectively, starting from their current working coordinates.  Line
drawing node has also a Move(X,Y) node effect on the environment, allowing
sequences of lines to be drawn, through vertical composition of such nodes. 
Node Colour(newcolour) defines the drawing colour for its subordinate subgraph
and node Planes(enable mask) defines video planes with permitted write
operations.  Node Sting(stringpointer) draws in current font and colour a
string of characters starting from the current (workX,workY) to the right.

The transistor above has been built out of appropriately positioned (Move)
boxes (Box) of diffusion (Plane(diffusion)) and polysilicon
(Plane(polysilicon)).

@b[Modularity and "Recipies" for cells]

The editor allows the user to create general descriptions of component
structures where subsequently they can be invoked with individual parameters
for each instantiation.

The building blocks in circuit design are described both in terms of their
component structure and their geometric attributes, like size, shape and
orientation.  For a transistor we may have either an "etpx" (polysilicon in
the x-direction) or an "etpy" (polysilicon in the y-direction).  Both these
objects share the same component structure but possess unique positioning
parameters.  We may think of an analogy of a "recipe" which describes how 
to construct an object and a list of "ingredients" which uniquely define 
each object type.  By partitioning the component description in this fashion
it is possible to perform geometric transformations such as scaling and
rotation without having to generate an entire component data structure each
time.  We merely provide a new list of ingredients.

@b[Argument arrays and indexing]

Nodes in the structure can obtain any of their two 16-bit arguments through 
indexing into the current environmental argument array.  Execution flags
indexA and indexB indicate wheter the first and the second half-word of the
argument (possibly obtained indirectly for Pointer = 1) are the final
arguments or indexes into such array.

The array itself is declared by a node Setarguments (array pointer) where
the new array pointer replaces the one inherited from above for the
subordinate subgraph of the declaration node.  The construct provides the
subgraphs which can be used like drawing procedures in several places in
the graph.

In the example above, the fixed-dimensions description of a transistor from
the previous page has been replaced by a "recipe" for a simple transistor,
where explicit dimensions have been replaced by indexes into a fixed-format
array.  Various effects like rotation and size variations can be obtained
through appropriate swopping or variation of values in the individual
declarations of argument arrays prior to "calling" the transistor drawing
graph.

The graph is no longer a tree, but it still remains acyclic.

@b[Replicated composition]

Examining a very large scale integrated circuit layout one observes that it
consists of clearly distinguishable cells (memory cell, ALU cell, data path
cell etc..).  There is also a certain regularity of pattern within each
cell itself.  This regularity is created by a repetition of basic cell
subsystems, a prime example being the generation  of a memory cell.  Here
the designer defines a basic single bit memory subsystem (seen here left top
in the background) and subsequently creates a complete memory cell by
abutted replication of the subsystem cell in both X and Y directions (top
subwindow).  A programming analogy is the 2-dimensional array and the
algorithm analogous to nested iteration cycles.  Such nested, 2-dimensional
composition will usually incorporate circuitry required at the edges of the
array.  In the example, the ram interface cell has been designed and
deposited on the right after each iteration in the X direction (bottom
subwindow).
 
This ability to iterate in the X  and Y direction is a very important tool
for the circuit designer.  It facilitates design creation and alleviates
the task of verifying a complete circuit cell, since if the subsystem cell
is geometrically correct and the abutting interface is also correct then
the entire cell is geometrically correct.

@b[Iteration]

Prior to descending along the vertical edge (for down=1) the evaluation
process checks wheter the iteration index in the current environment is
greater than zero and if not, the downward evaluation is not entered. 
There are two nodes that control the value of the iteration index in the
environment.  Setiteration(number) provides nested presetting of the index
and Deciteration decrements it along the vertical edges.

In order to perform an iterated invokation of a subgraph (here of a
subgraph drawing a RAM cell) we have to set the iteration index above the
graph and then create an iteration loop with decrementation of the index in
it.  In the example, a Move node is placed immediately to the right of the
cell, allowing the cells to be placed side by side.  It is followed
downwards by a Deciteration node, pointing in turn down back at the memory
cell.  This whole construct is then connected to the interface cell on the
right and embedded in the Y iteration construct above it.

@b[Virtual coordinates and design inspection]

Having adopted the structured design approach the circuit designer is free
to concentrate on individual leaf cell creation.  These leaf cells can be
quite large and complicated and in most cases extend beyond the domain of
the visible design workspace.  By providing functions such as panning and
viewing the editor offers a much larger virtual design workspace and uses
the graphics screen only as a viewport into the design.

The designer may then, during an editing session, view and edit sections of
the layout at arbitrary design scales.  Although each of the design
subwindows can show sections of the same design in different scales, the
whole of the design is represented and manipulated in its virtual
coordinates, here being equal to 1/8 lambda (a conventional design
dimension unit where its mapping onto real dimensions reflects the
resolution of production technology).

In the example the background window show a simple 8x4 memory array reduced
4x, the next window with 2x reduction allows inspection of RAM cells
abbutment and the top window, with 1.5x enlargement show the alignment
details on the right edge of the array.

@b[Deferred scaling]

A Dscale(factorX,factorY) declares  the environmental deferred scaling
factors in X and Y for the subordinate subgraph.  The operation is not
cummulative and there should be no more than one such node in each vertical
path in the graph.  The factors provide independent scaling in both axes,
and do not take effect immediately, allowing for unscaled composition of
objects in their virtual coordinates.  They are applied only by the final
drawing nodes prior to creating them on the screen.  Within these nodes
clipping is performed still in virtual coordinates.  For that reason the
only immediate effect of declaring a deferred scaling, remapping of the
clipping environment from above into the virtual coordinates below.

An inspection viewport into a design is created by vertically composed
declarations of its position (Move), size (Clip) and viewing scale
(Dscale).  The node Move(-vX,-vY) below expresses in designs virtual
coordinates the positioning of the left bottom corner of the viewport.  All
the viewports share the same global design structure.  Such "geometrical"
viewing should be distinguished from "structured" viewing, where the
viewport can point at the selected subgraphs within the design (the oblong
window on previous page was in fact drawn by pointing just below Y
iteration loop in the global design of RAM array).

It is also worth noticing that the presented order of Clip and Dscale nodes
fixes the physical size of the viewport, decreasing the amount of details
as scaling factors increase.  Swopping of these two nodes would result in a
constant amount of detail and a growing viewport as the clipping would now
be defined in the desing's virtual coordinates.

@Paragraph(Example 2:  Bounding boxes, cursors and pointers)

One of the major components of the screen in an interactive graphics system is
the representation of a pointing device and cursor operations, marking the
areas by the selected objects.  

In the example the pointer is implemented as a Template(pointer) drawing node,
which takes a bit-map representation of a shape (here a hand) in the memory
and deposits it, with current colour, at the position indicated by the current
working coordinates.  Normally, it will be placed under Colour(pointercolour)
and Move(mouseX, mouseY) nodes.  Such constructs are usually placed as the
last horizontal link within the window structure.  It may appear on the very
top of the graph, providing general pointing capability on the screen.  Others
may be linked within the applications windows, with appropriately zeroed and
clipped mouse coordinates supplied as arguments.

A Cursor(cursorpointer) node provides a nested declaration of a graph to be
used for drawing cursors.  Cursorpointer points at the top of the graph, which
assumes a predeclared 4-element argument array with the format of a node
bounding box information field.

The evaluation process upon return to the node from the downwards evaluation
updates the node bounding box informatio, being the cummulative effect of
executing the node and the subordinate graph.  This information is stored as
dimensions relative to the working corrdinates upon entry to the node.  Having
updated the bounding box information and upon seeing execution flag Cursor se
to 1 the evaluation process calls the current cursor drawing graph with the
environment in which the current argument array had been replaced by the node
bounding box defining field.

The construct allows to create individual cursors for various applications
with manipulation of flags being the only cost of invoking them.  Text strings
can be underlined on their baseline by a small downwards Move(0,-1),
vertically composed with Colour(cursorcolour) and two horizontally linked
Line,idxA(0,00 and Line,idxA(2,0) nodes.  To underline a string just below its
lowest descendent it is enough to add a vertically composed Move,idxB(0,1). 
Similarly, full background and graming cursors can be defined.

Bounding box information is also used by the VLSI editor for joining of cells,
where the Move positioning individual RAM cells picks up its arguments from
the top node of the cell.  Similarly, the positioning of the interface cells
at the end of X iteration loop obtains its Y argument from the node on top of
the loop.

Variation in fonts is achieved through a nested font(fontpointer) node, which
declares a pointer to an array of 256 short integers being offsets to
templates of individual characters within the font.

@b[Example 3:  Nested window and stuctured addressing of objects]

All of the examples have benn developed within nested windowing environments.

A window can be defined by specifying its relative position
(Move(Xbase,Ybase)), its size (Clip(Xsize, Ysize)) and background colour
(colour(background)).  The construct can be nested, where subwindow can be
used to host different areas of activity maintained by the application process
within the window.

The portrait of a don in window 1 was brought in as a Template in yellow, 
Window 2 contains two subwindows 2A and 2B, and the greyscale picture in
window 3 has been brought in by a Pixels(pointer) node from the main system
memory.

The task of identifying an object addressed by the mouse coordinates can be
split into two basic tasks.  The first one is the identification of the nodes
in the graph with bounding boxes covering these coordinates.  It involves a
fairly simple top-down scn of the graph, where its vertical edges are followed
only for the nodes containing the pointer address.  Such scanning creates
vertical paths in the graph, where more than one hierarchically unrelated
nodes.  Example positioning of the pointer creates only one path, which is
depicted by invoking a graming cursor for all the nodes containing it. 
Positioning of the pointer on "W" in window 2B would create 3 such paths.

The second task is the identification of a node within the paths, where the
active window identity, and the application running within it perform the
final selection.

@b[Example 4:  Structured program display]

Another example is that of a structured display of programs, where the
language syntax tree has been mapped almost directly onto the display graph.

Appropriate "recipe" subgraphs have been initially created to descibe the mode
of printing basic strings.  The keyword printing environment has been defined
as "times roman bold" in white, names have been declared as strings in red
"times roman", comments as italicised green strings and all the remaining
syntactic tokens are printed in blue.  Each token has been declared once with
its multiple appearances implemented through pointers.

The layout of the program on the screen is obtained through appropriate
pairing of syntactic constructs of the language with their graphics structure
definitions.  A block is a vertical composition of a Begin token with an
indented, vertically composed list of statements and an End token at the
bottom.  Indentation is achieved through a Move(indentstep,0) node above the
statements list.  Such a construct when nested, allows for nested indentation
of program representation on the screen.

Having declared the cursor as a framing box it is possible now to frame
addressed syntacic nodes of the program through placing Cursor flags on the
corresponding nodes of its graphics representation. Here the cursor is placed
on the block under the While loop.

@b[Example 5:  Dual buffering]

The system assumes the use of a dual buffering technique for most of the
applications, where a new image is being created outside the currently visible
area of the framestore, and upon completion is swopped onto the screen during
the nearest vertical flyback.  The technique assumes framestore memory size to
be at least twice the size of the amount memory: geometrically in X or Y
through framestore offset registers, or by mapping different sets of planes
into the video output.

In the example two 768x512 pixel buffers are fitted one above the other in a
1024x1024 framestore.  Top SetXY(baseX,baseY) node of the structure places the
absolute evaluation coordinates (workX, workY) in relative (0,0) coordinates
of one of the frames.  A clip(768,512) node below it protects the
neighbouring, displayed frame and points vertically to the image definition
graph.  Having completed evaluating the main graph, a FlybackYPan(baseX,baseY)
through framestore offset registers puts the display area over the newly
evaluated frame.  SetXY and Pan nodes indirect into a 2-element offset
definition, where location X remains at 0 and Y is alternatively swapped
between 0 and 512.

@SubSection(Arguments and data structures)

All pointers are 32-bit integers, interpreted as absolute byte addresses in
the machine address space.

Additive/substractive arguments are represented as 16-bit 2's complement
integers. 

Scaling factors are signed 16-bit numbers with binary point between bits 7 and
8 of the word.

There are a number of data structures that can appear as arguments in the
nodes.

@Begin(Description)
Pixelmap
@\is represented by 2 16-bit words specifying the width and the height of the
map, followed by the map itself, stored as width-long sequence of 1 pixel-wide
vertical lines; one byte per pixel.  Following the increasing addresses of the
representation pixels will be drawn on the screen from bottom upwards, with
consecutive vertical lines appearing to the right of their predecessors.

Template
@\consists of a 4 half-words header followed by the bitmap of the template. 
The half-words 0 and 1 contain template offsets in X and Y from the current
working coordinates and half-words 2 and 3 specify width and height of the
template.  Offsets are primarily ysed for positioning templates of the 
characters relatively to the baseline and the in-line horizontal positioning
coordinate.  They will be usually 0 for non-character type templates.  The
template itself is stored as (width/16 + 1)-long sequence of height-long
vertical strips.  Following the increasing addresses in the representation,
individual strips will be drawn on the screen from bottom upwards, with most
significant bits on the left. Consecutive strips are placed to the right of
their predecessors.

Font
@\is stored as a list of templates for individual characters.  Such list of
templates is preceeed by an arry indexed by the codes of characters and
containing pairs of short integers.  The first integer in each pair contains
offset from the base of array to the template of the corresponding character
and the second contains the formatting width of the character.  Entries of 0
in the first element of the pair indicate characters for which templates have
not been defined in that particular font and their occurence is used by the
protocol as one of termination conditions when drawing character strings. 
Width of the character represents the distance to the base of the next
character to the right.

Arrays
@\are always 1-dimensional short-integer arrays, with the lowest element
having index 0.
@End(Description)
@SubSection(Evaluation environment)

Each node is executed within the environment inherited from the previous node,
and it may modify this environment prior to passing it to the next nodes:
down, to the right or up.

The environment consists of:
@Begin(Description)

Colour
@\Current colour for the subordinate drawing nodes.

Planes
@\A mask of planes with enabled write operation for the subordinate drawing
nodes.

(WorkX,WorkY)
@\A pair of current working coordinates.

(bblX,bbbY)
@\Left-hand bottom corner of the image bounding ox.

(bbrX,bbtY)
@\Right-hand top corner of the image bounding box.

(cblX,cbbY)
@\Left-hand bottom corner of the environmental clipping box.

(cbrX,cbtY)
@\Right-hand top corner of the environmental clipping box.  Clip boundaries
are the intersection of all the clipping boundaries set by the clipping nodes
above the current position.  Deferred scaling node maps them (division) into
the virtual coordinates of the subordinate image.

(basX,basY)
@\Absolute starting point of the evaluation.

(refX,refY)
@\Current (0,0) reference point for nodes using absolute positioning
coordinates.

(dscaleX,dscaleY)
@\A deferred scaling factor provided to support virtual to physical coordinate
transformation.  Deferred factor is applied to the coordinates and arguments
in drawing nodes, thus allowing the construction of the image above them to be
expressed in the virtual design coordinates.  Deferred scaling factor applies
immediately only to the inherited clipping coordinates, where reverse scaling
of environmental coordinate information allows to implement physical clipping
of images expressed in virtual coordinates.  Clipping in virtual coordinates
is achieved through positioning deferred scaling node above the clipping
nodes.

Iteration
@\Factor which must be greater then 0 for the interpreter to follow the
vertical exit edge from the node.

Fontbase
@\Pointer indicates the base of the current font to be used in all the
subordinate string drawing operations.

Argument array
@\Points to a one-dimensional array of shortwords which can be used as
arguments in the subordinate graph.  Entering the same subgraph with different
array of arguments, is similar to the passing of arguments to a drawing
procedure.  Such subgraph should contain appropriate index flags set for the
nodes to which such arguments are to be passed and appropriate array indexing
information in its argument fields.

Cursor
@\Points to a graph currently responsible for drawing of cursors.  Nodes of
such graph will be usually designed to pick up arguments from the environment
which invoked the graph.
@end(Description)

@SubSection(Summary of node format)

Byte 0 of half-word 0 contains the instruction code.

Byte 1 contains flags, part of which parameterize the execution of the
instruction or of its subordinate subgraph.

Flags (Optimise,Wait,Pointer,IndexA,IndexB,Cursor,Down,Right) correspond to
bits [7:0] of the byte.

@Begin(Description)
Optimise
@\Optimise flag invokes optimised evaluation of the subordinate graph, where
the interpreter will follow only those vertical edges, where the bounding box
of the image is expected to intersect with the current clipping box.  Such
evaluation, although fairly simple to maintain at the top level nodes e.g.
with multiwindow textual displays becomes more complicated for more
sophisticated structures and may require significatn monitoring of
differential changes in the graph.

Wait
@\When 1, Wait forces the interpreter to execute a partial completion sequence
and halt immediately after executing the return phase of the node.

Pointer
@\When 0, Pointer indicates that arguments are stored immediately in the
instruction starting with halfwords 2 and 3.  For Pointer = 1 halfwords 2 and
3 from a 32-bit argument pointer.

IndexA
@\When 0, indicates that argument A is directly accessible immediately or
through a pointer, depending on the Pointer flag.  IndexA = 1 signals that the
value obtained through such access is the argument index in the current
argument array (See the description of individual nodes for the declaration of
the current argment array).

IndexB
@\has the same function as IndexA but applies to argument B.

Cursor 
@\Set to 1 result in temporary replacement of the current argument array
pointer with a pointer to the bounding box corrdinates of the node, followed
by a call to the current cursor drawing graph.

Down
@\Indicates that half-words 7 and 8 contain a valid pointer to the first
instruction of a chain in the subordinate subgraph.  For Down =, 0 the
interpreter will execute return phase of the instruction without entering the
evaluation of the subordinate graph.  Down = 1 will be ignored for the
iteration index in the current environment being 0.

Right
@\@Begin(Multiple)Indicates that half-words 9 and 10  contain a valid pointer to the next of
horizontally linked chain of instructions.  Upon encountering Right=0 the
interpreter will execute the "return" part of the instruction which invoked
the currently terminated chain.  Right=0 encountered at the level at which the
evaluation was invoked will terminate the evaluation.

The flag can be used for temporary disabling of manipulated parts of the
picture.  When modelling execution of a command stream the Right=0 marks the
last instruction of the stream.@End(Multiple)
@End(Description)

Half-words 1 and 2 contain information about the arguments for the node,
subject to interpretation under flags Pointer and Index.

The node contains also the information about the bounding box of the
subordinate picture.  This information, depending on the invoked mode of
evaluation can be:
@Begin(Itemize)
upddated by the evaluation process through the evaluation of the subgraph,

used by the evaluation process during the optimised evaluation where
subordinate images with bounding boxes outside the clipping coordinates are
note evaluated.
@End(Itemize)

Bounding box coordinates relative to the current working (X<Y) coordinates of
the interpreter are stored in half-words 3-6.  Half-words (3,4) and (5,6)
contain (X,Y) coordinates of left-hand bottom and right-hand top corners of
the box.

@SubSection(Nodes of the graphics data structure)

In the following descriptions arguments of operation are shown in italics and
represent values obtained from half-words 1 and 2 through appropriate
interpretation of flags Pointer and Index.

@Paragraph(Non-drawing, environment modification nodes)

FONT(@b[fontbase])
The subordinate graph will use the font starting at @b[fontbase].

COLOUR(@B[colour])
@b[colour] becomes the colour for all the subordinate drawing operations.

PLANES(@b[mask])
Planes indicated by 1's in @b[mask] will be enabled for writing in the
subordinate graph.

RASTER(@b[rasterpointer])
In the subordinate graph the raster at @b[rasterpointer] will be used as a
raster by all the area-filling operations.  The initialisation raster is:
(16,1,16_FFFF) resulting in complete fill of the area.

CURSOR(@b[cursorpointer])
@b[cursorpointer] points the top node of the cursor drawing structure for the
subordinate nodes.

ARGUMENT(@b[arraypointer])
@b[arraypointer] points to the first element (indexed 0) of the argument array
for the subordinate nodes.

CLIP(@b[sizeX,sizeY])
Clipping in a rectangle of size @b[sizeX,sizeY] starting from the current
position.  As an environmental attribute subject to retrospective inverse
scaling by the deferred scaling node.

REFPOINT(@b[refX,refY])
Current X and Y coordinates modified by @b[refX] and @b[refY] become a
reference (0,0) point for the absolute (X,Y) arguments used by the subordinate
nodes.

MOVE(@b[modX,modY])
Current X and Y coordintes are modified by @b[modX] and @b[modY] respectively. 
@b[modX], @b[modY] may have to be prescaled by the current immediate scaling
factors.

MOVETO(@b[absX,absY])
Current X and Y coordinates are modified by @b[absX],@b[absY] relative to the
current reference point.

DSCALE(@b[factorX,factorY])
Declaration of deferred scaling.  Excludes presence of any other scaling nodes
in any of the vertical paths containing this node.

SETITERATION(@b[iteration])
Declares iteration index @b[iteration] for the subordinate picture.  During
execution flag "Down" is ignored if iteration index in the environment is 0.

DECITERATION
Decrements iteration index in the environment.

@Paragraph(Drawing nodes)

Drawing nodes are responsible for the final drawing operations.  In most
applications they will appear as leaf nodes (flag Down = 0) and the evaluation
will subsequently move to the next horizontally linked node or to the return
phase of the node above.

BOX(@b[Xsize,Ysize])
Fills with current colour a box of sixe @b[(Xsize,Ysize)], starting at current
evaluation coordinates.  Evaluation coordinates for X and Y are modified by
@b[Xsize] and @b[Ysize] respectively.  @b[(Xsize,Ysize)] are subject to scaling
by the cummulated immediate or by the deferred scaling factors.

BOXTO(@b[absX,absY])
Similar to BOX but the fill area is defined by its corners: one in current
evaluation coordinates and the other @b[(absX,absY)] away from the current
reference point.

POLYGON(@b[argumentlis])
Fills with current  colour a ploygon starting at current evaluation
coordinates and outlined by consecutive relative movements specified in
@b[argumentlist].

LINE(@b[Xsize,Ysize])
Draws a straigh line from the current evaluation coordinates to a point
distant by @b[(Xsize,Ysize)].

LINETO(@b[absX,absY])
Similar to LINE but in absolute coordinates.

TEMPLATE(@b[template])
A pattern defined by the template is filled with current colour at the current
evaluation coordinates.

PIXELMAP(@b[pixelmap])

STRING(@b[stringpointer])
Draws in current colour and with current font a string of characters.  
Interpretation continues up to a character defined as a terminator by the 
selected font.

VSTRING(@b[stringpointer]), BSTRING(@b[stringpointer])
Draw strings of characters using fonts from VISUAL200 and Perkin Elmer
terminals.

@Paragraph(Control nodes)

FLYBACKY
Witholds execution of the following instruction till the beginning of the
nearest framestore vertical flyback.  Most of the following instructions
require such synchronization.

COLOURMAP(@b[colourmappointer])
Consecutive locations of the framestore colourmap are loaded with the
consecutive store values starting at @b[colourmapoointer]. 8-bit intensities
for red, green and blue are represented by bits [7:0], [15:8] and [23:16] of
consecutive 32-bit words.

SETXY(@b[Xoffset,Yoffset])
Explicity sets X and Y evaluation coordinates.  Intended for support of
dual-buffering scheme with two such nodes used alternately as entry points to
the structure.

PAN(@b[Xoffset,Yoffset])
Left-hand bottom corner of the display will is placed at
((@b[Xoffset]/16)*16,@b[Yoffset]) in the framestore.  Can be used with SETXY
and FLYBACKY to implement dual-buffering.

DEPOSITENV(@b[environmentpointer])
This node deposits at the location indicated by the @b[environmentpointer] the
contents of its current working environment.

PICKUPENV(@b[environmentpointer])
Partial evaluation of the structure starting from a chosen node may be invoked
through setting up the working environment to that of the current environment
of the node from the previous full evaluation.  @b(environmentpointer) will be
usually the same as in DEPOSITENV node which should preceed the chosen entry
node in the structure.  Such optimised evaluation can be invoked when
activities are concentrated within the topmost windows.

CALLMICRO(@b[microaddress])
Sections of new microcode can be invoked, through a call to a chosen microcode
location.  This would usually refer to additional, loadable microcode memory. 
In case of partial replacement (e.g. when trying out new instructions) proper
care should be taken of the consistency of the stacks (main and
microinstruction on).

CLEAR
Resets the evaluation stack pointer.  Should be invoked after abnormal
completion.

REPORTADDR(@b[reportpointer])
Sets @b[reportpointer] as destination for REPORT nodes.

REPORT(@b[reportvalue])
fWill deposit @b[reportvalue] at the location @b[reportpointer].  Can be used
to trace the progress of evaluation.

@Subsection(Interaction between the user processor and the interpreter)

After initialisation, as well as after each completed evaluation the graphics
processor-interpreter puts itself into a wait state.

The process requiring the evaluation should set up all the necessary startyp
environment including the required action on completion (e.g. REPORT node) and
then wake up the graphics processor through a write into location E04000.

The processor picks up from the environment its starting execution pointer and
performs depth-first scan of the structure.  It will halt upon completion,
upon encountering flag Wait=1 or upon invalid opcode.

@Paragraph(Startup environment)

Local graphics processor memory is under addresses 16_E0E000-16_E0FFFE in the
APM address space.

@begin(fileExample, LeftMargin +0)
Address   Attribute           Description
                              
E0E000    Ecution pointer     Prior to evaluation should be loaded
                              with a pointer to the required entry
                              node (or to the first command in 
                              stream execution).  During evaluation 
                              it contains the current execution 
                              pointer.

E0E004    Execution flags

E0E006    Current colour      Contains current colour.

E0E008    Current plane       16-bit mask with 1's indicating planes 
                              enabled write operation.

E0E00A    Current X           Current working X coordinate.

E0E00C    Current Y           Current working Y coordinate.

E0E00E    Boundix box         Left C coordinate.

E0E010                        Bottom Y coordinate.
E0E012                        Right  X coordinate.
E03014                        Top    Y coordinate.

E0E016    Clipping box        Left   X coordinate.
E0E018                        Bottom Y coordinate.
E0E01A                        Right  X coordinate.
E0E01C                        Top    Y coordinate. 

E0E01E    Base point          X.
E0E020                        Y.

E0E022    Reference point     X.
E0E024                        Y.

E0E026    Deferred scaling    X scaling factor.
E0E028                        Y scaling factor.

E0302A    Iteration inex      Iteration index can be explicitly set
                              or it can be decremented.  When 0 it 
                              inhibits evaluation of the subgraph of
                              the node.

E0E02C    Current font        Current font pointer contains the address 
                              of the font definition.

E0E030    Argument array      It is a pointer to the base of the current
                              argument array.

E0E034    Cursor              Cursor pointer addresses a graph currently 
                              used  for  drawing  cursors.  Such  graph 
                              will usually  contain  indexed  argument 
                              references  in  the  array  defining  the 
                              bounding box of the image.
@End(FileExample)