/* EPC Imp to C Translation Release 4 Version Apr 95 */ #include "imptoc.h" /** 29 Nov 96 Added the Pentium Prop instructions p5sched6.inc*/ /** (these do no exist on Pentium but the holes in the table must */ /** be filled with something!) */ /** 29 Oct 95 Corrections to beats for shifts p5sched5.inc*/ /** 08 Aug 95 Added the long double support instructions p5sched4.inc*/ /** p5sched2.inc*/ /** 18 Oct 93 This new include file is designed to hold architecturally */ /** specific scheduling related information. This include file */ /** is used by the bprocs (backend optimiser) module. (rt) */ /***/ /** The Pentium does not fit well with this model. We class U0 as the */ /** vpipe and U1 as the U pipe. We postulate two v pipes even tho the second */ /* is really the U pipe. However some operand forms force instructions thro */ /* the u pipe. This will require special codeing in bprocs */ /*******************************************************************************/ /**/ /* ***********************************************/ /* * PENTIUM BASIC BLOCK SCHEDULING INFORMATION **/ /* ***********************************************/ /**/ /* The scheduling info consists of the following fields: */ /**/ /* unit : Identifies the pentium execution unit which processes the */ /* operation. */ /* blockage: Gives the number of clocks before the execution unit */ /* can be issued with another instruction (assuming no data */ /* hazards). */ /* latency : Gives the number of clocks before the result of the instruction*/ /* is available. */ /* There is a primary and a secondary latency field. The primary*/ /* latency is always used unless the instruction results which */ /* are used belong to the alternatively delayed set of */ /* registers. */ /* A negative primary latency may be given. In this case the actual*/ /* instruction latency is considered to be the absolute magnitiude*/ /* of the value but the calculated stall factor for the */ /* instruction is biased. This is used by load instructions */ /* which have a minimum latency which occurs if there is a cache*/ /* hit but also a larger latency which occurs if there is a miss.*/ /* The stall factor bias allows load instructions to be scheduled*/ /* even earlier than that suggested by the minimum latency if that*/ /* will not cause stalls for other instructions. */ /** The lowest opcode for which scheduling information is maintained */ #define MINSCHOP 0 /** The highest opcode for which scheduling information is maintained */ #define MAXSCHOP 250 /** MIPS must always have a delay slot instruction present for control */ /** flow change instructions (even if it is a NOP) */ #define DELAYSLOTMUSTEXIST 0 /** Annullable delay slots are only supported on the R4000 implementation of MIPS*/ #if((Target==MIPS)&&(targetvariant==R4000)) #define ISANNULLABLEUNTAKEN 1 #else #define ISANNULLABLEUNTAKEN 0 #endif; /** MIPS is internally a Harvard architecture so there are no load/store */ /** access penalties */ #define LOADACCESSPENALTY 0 #define STOREACCESSPENALTY 0 /** General architectural information for MIPS */ #define ISSUPERSCALAR 1 #define ISDOUBLEOPCODE 0 #define ISERFREQUIRED 1 #define ISCRFREQUIRED 1 /** Execution unit information for MIPS */ #define MAXUNITNUM 1 #define U0 1 #define U1 2 /* integer unit ie vpipe*/ /* FPU - general ie upipe*/ static const int NumUnits [U1-(U0)+1] = {2,1}; static const int IsExecRS [U1+1] = {0,0,0}; #define HASSHADOWREGS 0 static char * ExecNames [U1+1] = {"Nonx","U0","U1"}; static const int UnitNumMap [MAXUNITNUM+1] = {U0, U1}; /** Information for alternatively delayed registers (none on MIPS) */ #define ALTDELAYEDGRF (0xFF00) #define ALTDELAYEDERF 0 #define ALTDELAYEDCRF 0 #define ALTDELAYEDDRF 0 /** Registers for which interference should be ignored ($0 on MIPS) */ #define GRFEXEMPT 0 #define ERFEXEMPT 0 #define CRFEXEMPT 0 #define DRFEXEMPT 0 /** Number of beats in processor simulation scoreboard */ #define CPmax 63 /***/ /***/ static const unsigned char SchedTable [(4*((MAXSCHOP-MINSCHOP)+1))-1-(MINSCHOP)+1] = { /* */ /* |-----------------------| |-----------------------| */ /* | instruction mnemonic | | scheduling | */ /* |-----------------------| |-----------------------| */ /* */ /* Unimp = 0; ! SPECIAL Noform*/ U0, 1, 1, 1, /* adc = 1; ! Intops X2form*/ U1, 1, 2, 2, /* add = 2; ! Intops x2form*/ U0, 0, 1, 2, /* and = 3; ! INTOPSu X2form*/ U0, 0, 1, 2, /* bound = 4; ! INTOPSu X2form*/ U1, 8, 8, 8, /* bt = 5; ! INTOPSu X2form*/ U1, 4, 4, 4, /* call = 6; ! JUMPLINK Jform*/ U0, 0, 1, 1, /* callptr = 7; ! JUMPLINK JRform*/ U1, 1, 1, 1, /* cwde = 8; ! INTOPS Noform*/ U1, 3, 4, 4, /* clc = 9; ! SPECREGrw Noform*/ U1, 2, 2, 2, /* cld = 10; ! SPECREGrw Noform*/ U1, 2, 2, 2, /* cmc = 11; ! SPECREGrw Noform*/ U1, 2, 2, 2, /* cmp = 12; ! INTOPS X2form*/ U0, 0, 1, 1, /* cmpsb = 13; ! STROP NOform*/ U1, 5, 5, 5, /* cmpsd = 14; ! STROP Noform*/ U1, 5, 5, 5, /* cmpb = 12; ! INTOPS X2form*/ U0, 0, 1, 1, /* cdq = 16; ! INTOPS NoForm*/ U1, 2, 2, 2, /* dec = 17; ! INTOPS X1form*/ U0, 0, 1, 2, /* div = 18; ! INTOPSu X2iform*/ U1, 41, 42, 42, /* enter = 19; ! StkForm X1lform*/ U1, 15, 15, 15, /* idivide = 20; ! INTOPS X2iform*/ U1, 46, 47, 47, /* imul = 21; ! INTOPS X2iform*/ U1, 10, 11, 11, /* imuld = 22; ! INTOPS X2iform*/ U1, 10, 11, 11, /* inc = 23; ! INTOPS X1form*/ U0, 0, 1, 2, /* JO = 24; ! BCC JForm*/ U0, 0, 1, 1, /* JNO = 25; ! BCC JForm*/ U0, 0, 1, 1, /* JB = 26; ! BCC JForm*/ U0, 0, 1, 1, /* JNB = 27; ! BCC JForm*/ U0, 0, 1, 1, /* JE = 28; ! BCC JForm*/ U0, 0, 1, 1, /* JNE = 29; ! BCC JForm*/ U0, 0, 1, 1, /* JBE = 30; ! BCC JForm*/ U0, 0, 1, 1, 0,0,0,0, /* JA = 32; ! BCC JForm*/ U0, 0, 1, 1, /* JS = 33; ! BCC JForm*/ U0, 0, 1, 1, /* JNS = 34; ! BCC JForm*/ U0, 0, 1, 1, /* JP = 35; ! BCC JForm*/ U0, 0, 1, 1, /* JNP = 36; ! BCC JForm*/ U0, 0, 1, 1, /* JL = 37; ! BCC JForm*/ U0, 0, 1, 1, /* JGE = 38; ! BCC JForm*/ U0, 0, 1, 1, /* JLE = 39; ! BCC JForm*/ U0, 0, 1, 1, /* JG = 40; ! BCC JForm*/ U0, 0, 1, 1, /* jmp = 41; ! BCC Jform*/ U0, 0, 1, 1, /* jmpptr = 42; ! BCC JRform*/ U1, 2, 2, 2, /* LAHF = 43; ! SPECREGrw NoForm*/ U1, 2, 2, 2, /* les = 44; ! INTLOAD X2Form*/ U1, 2, 3, 3, /* lds = 45; ! INTLOAD X2Form*/ U1, 2, 3, 3, /* lea = 46; ! INTOPS X2Form*/ U0, 0, 1, 2, /* lbnox = 47; ! INTLOAD X2Form*/ U0, 0, 1, 2, /* lb = 48; ! INTLOAD X2Form*/ U1, 1, 3, 3, /* lbu = 49; ! INTLOAD X2Form*/ U1, 1, 3, 4, /* lh = 50; ! INTLOAD X4Form*/ U1, 1, 2, 5, /* lhu = 51; ! INTLOAD X2Form*/ U1, 1, 4, 5, /* lw = 52; ! INTLOAD X2Form*/ U0, 0, 1, 2, /* leave = 53; ! SPECIAL StkForm*/ U1, 3, 3, 3, /* lodsb = 54; ! STROP Noform*/ U1, 1, 2, 3, /* lodsd = 55; ! STROP NOform*/ U1, 1, 2, 3, /* mov = 56; ! INTOPSu X1form*/ U0, 0, 1, 2, /* movsr = 57; ! SPECREGrw X1form*/ U1, 2, 3, 3, /* movsb = 58; ! STROP Noform*/ U1, 4, 4, 4, /* movsd = 59; ! STROP NOform*/ U1, 4, 4, 4, /* movsx = 60; ! STROP NOform*/ U1, 1, 4, 5, /* movzx = 61; ! STROP X2form*/ U1, 1, 4, 5, /* movb = 62; ! INTOPSu X1form*/ U0, 0, 1, 2, /* mul = 63; ! INTOPSu X2iForm*/ U1, 11, 12, 12, /* neg = 64; ! INTOPS X1form*/ U0, 0, 1, 2, /* nop = 65; ! SPECIAL Noform*/ U0, 0, 1, 1, /* not = 66; ! INTOPSu X1form*/ U1, 1, 1, 2, /* or = 67; ! INTOPSu X2form*/ U0, 0, 1, 2, /* pop = 68; ! SPECIAL Stkform*/ U0, 0, 1, 1, /* push = 69; ! SPECIAL Stkform*/ U0, 0, 1, 1, /* rol = 70; ! SHIFTS SLitform*/ U0, 1, 2, 3, /* rolv = 71; ! SHIFTS X2iForm*/ U1, 7, 8, 8, /* ror = 72; ! SHIFTS Slitform*/ U0, 1, 2, 3, /* rorv = 73; ! SHIFTS X2iForm*/ U1, 7, 8, 8, /* SAHF = 74; ! SPECREGrw NoForm*/ U1, 2, 2, 2, /* sb = 75; ! INTSTORE X2Form*/ U0, 0, 1, 1, /* st = 76; ! INTSTORE X2Form*/ U0, 0, 1, 1, /* sh = 77; ! INTSTORE X2Form*/ U1, 0, 2, 2, /* SETO = 78; ! INTOPSu X1Form*/ U0, 0, 1, 2, 0,0,0,0, /* SETNO = 80; ! INTOPSu X1Form*/ U0, 0, 1, 2, /* SETB = 81; ! INTOPSu X1Form*/ U0, 0, 1, 2, /* SETNB = 82; ! INTOPSu X1Form*/ U0, 0, 1, 2, /* SETE = 83; ! INTOPSu X1Form*/ U0, 0, 1, 2, /* SETNEQ = 84; ! INTOPSu X1Form*/ U0, 0, 1, 2, /* SETBE = 85; ! INTOPSu X1Form*/ U0, 0, 1, 2, /* SETA = 86; ! INTOPSu X1Form*/ U0, 0, 1, 2, /* SETS = 87; ! INTOPSu X1Form*/ U0, 0, 1, 2, /* SETNS = 88; ! INTOPSu X1Form*/ U0, 0, 1, 2, /* SETP = 89; ! INTOPSu X1Form*/ U0, 0, 1, 2, /* SETNP = 90; ! INTOPSu X1Form*/ U0, 0, 1, 2, /* SETL = 91; ! INTOPSu X1Form*/ U0, 0, 1, 2, /* SETGE = 92; ! INTOPSu X1Form*/ U0, 0, 1, 2, /* SETLEQ = 93; ! INTOPSu X1Form*/ U0, 0, 1, 2, /* SETG = 94; ! INTOPSu X1Form*/ U0, 0, 1, 2, 0,0,0,0, /* sal = 96; ! SHIFTS SLitForm*/ U1, 0, 1, 2, /* salv = 97; ! SHIFTS X2iForm*/ U1, 4, 4, 5, /* shl = 98; ! SHIFTS SLitForm*/ U1, 0, 1, 2, /* shlv = 99; ! SHIFTS X2iForm*/ U1, 4, 4, 5, /* sar =110; ! SHIFTS SLitForm*/ U1, 0, 1, 2, /* sarv =101; ! SHIFTS X2iForm*/ U1, 4, 4, 5, /* shr =112; ! SHIFTS SLitForm*/ U1, 0, 1, 2, /* shrv =103; ! SHIFTS X2iForm*/ U1, 4, 4, 5, /* shld =104; ! SHIFTS SLitForm*/ U1, 4, 4, 5, /* shldv =105; ! SHIFTS ShForm*/ U1, 4, 4, 5, /* shrd =106; ! SHIFTS SLitForm*/ U1, 4, 4, 5, /* shrdv =107; ! SHIFTS ShForm*/ U1, 4, 4, 5, /* sbb =108; ! INTOPS X2form*/ U0, 0, 1, 2, /* sub =109; ! INTOPS X2form*/ U0, 0, 1, 2, /* stc =110; ! SPECREGrw NoForm*/ U1, 2, 2, 2, 0,0,0,0, /* std =112; ! SPECREGrw NoForm*/ U1, 2, 2, 2, /* stosb =113; ! STROP NoForm*/ U1, 3, 3, 3, /* stosw =114; ! STROP NoForm*/ U1, 3, 3, 3, /* testi =115; ! INTOPSu X1lform*/ U0, 0, 1, 1, /* test =116; ! INTOPSu X2Form*/ U0, 0, 1, 1, /* wait =117; ! SPECIAL NOform*/ U1, 1, 1, 1, /* xchg =118; ! INTSTORE X2form*/ U1, 2, 3, 4, /* xor =119; ! INTOPSu X1form*/ U0, 0, 1, 2, /* xori =120; ! INTOPSu X2form*/ U0, 0, 1, 2, /* ret =121; ! SPECIAL NoForm*/ U0, 0, 1, 1, /* popfd =122; ! SPECREGrw NOform*/ U1, 2, 2, 2, /* pushfd =123; ! SPECREGrw NOform*/ U1, 3, 3, 3, /* bswap =124; ! SPECIAL NoForm*/ U0, 0, 1, 1, /* retn =125; ! SPECIAL NoForm*/ U0, 0, 1, 1, /* Cmovcc =126-141; ! INTOPSu X2Form */ U0, 0, 1, 1, /* Cmovcc =126-141; ! INTOPSu X2Form */ U0, 0, 1, 1, /* Cmovcc =126-141; ! INTOPSu X2Form */ U0, 0, 1, 1, /* Cmovcc =126-141; ! INTOPSu X2Form */ U0, 0, 1, 1, /* Cmovcc =126-141; ! INTOPSu X2Form */ U0, 0, 1, 1, /* Cmovcc =126-141; ! INTOPSu X2Form */ U0, 0, 1, 1, /* Cmovcc =126-141; ! INTOPSu X2Form */ U0, 0, 1, 1, /* Cmovcc =126-141; ! INTOPSu X2Form */ U0, 0, 1, 1, /* Cmovcc =126-141; ! INTOPSu X2Form */ U0, 0, 1, 1, /* Cmovcc =126-141; ! INTOPSu X2Form */ U0, 0, 1, 1, /* Cmovcc =126-141; ! INTOPSu X2Form */ U0, 0, 1, 1, /* Cmovcc =126-141; ! INTOPSu X2Form */ U0, 0, 1, 1, /* Cmovcc =126-141; ! INTOPSu X2Form */ U0, 0, 1, 1, /* Cmovcc =126-141; ! INTOPSu X2Form */ U0, 0, 1, 1, /* Cmovcc =126-141; ! INTOPSu X2Form */ U0, 0, 1, 1, /* Cmovcc =126-141; ! INTOPSu X2Form */ U0, 0, 1, 1, 0,0,0,0, 0,0,0,0, /* FILD =128; ! FPLOAD F1Form*/ U1, 3, 3, 3, /* FLDd =129; ! FPLOAD F1Form*/ U1, 1, 1, 1, /* FLDm =130; ! FPLOAD F1Form*/ U1, 1, 1, 1, /* FISTP =131; ! FPSTORE F2pForm*/ U1, 6, 6, 6, /* FSTPd =132; ! FPSTORE F2pForm*/ U1, 2, 2, 2, /* FSTPm =133; ! FPSTORE F2pForm*/ U1, 2, 2, 2, /* FIST =134; ! FPSTORE F2Form*/ U1, 6, 6, 6, /* FSTd =135; ! FPSTORE F2Form*/ U1, 2, 2, 2, /* FSTm =136; ! FPSTORE F2Form*/ U1, 2, 2, 2, /* FIADDm =134; ! FPOPS2 FmForm*/ U1, 7, 7, 7, /* FADDd =138; ! FPOPS2 FmForm*/ U1, 1, 3, 3, /* FADDm =139; ! FPOPS2 FmForm*/ U1, 1, 3, 3, /* FADDP =140; ! FPOPS2 F2Form*/ U1, 1, 3, 3, /* FADD =141; ! FPOPS2 F2Form*/ U1, 1, 3, 3, /* FIMULm =142; ! FPOPS2 FmForm*/ U1, 4, 7, 7, 0,0,0,0, /* FMULd =144; ! FPOPS2 FmForm*/ U1, 2, 4, 4, /* FMULm =145; ! FPOPS2 FmForm*/ U1, 2, 4, 4, /* FMULP =146; ! FPOPS2 F2Form*/ U1, 2, 4, 4, /* FMUL =147; ! FPOPS2 F2Form*/ U1, 2, 4, 4, /* FISUBm =148; ! FPOPS2 FmForm*/ U1, 7, 8, 8, /* FSUBd =149; ! FPOPS2 FmForm*/ U1, 1, 3, 3, /* FSUBm =150; ! FPOPS2 FmForm*/ U1, 1, 3, 3, /* FSUBP =151; ! FPOPS2 F2Form*/ U1, 1, 3, 3, /* FSUB =152; ! FPOPS2 F2Form*/ U1, 1, 3, 3, /* FISUBRm =153; ! FPOPS2 FmForm*/ U1, 7, 8, 8, /* FSUBRd =154; ! FPOPS2 FmForm*/ U1, 1, 3, 3, /* FSUBRm =155; ! FPOPS2 FmForm*/ U1, 1, 3, 3, /* FSUBRP =156; ! FPOPS2 F2pForm*/ U1, 1, 3, 3, /* FSUBR =157; ! FPOPS2 F2Form*/ U1, 1, 3, 3, /* FIDIVm =158; ! FPOPS2 FmForm*/ U1, 42, 43, 43, 0,0,0,0, /* FDIVd =160; ! FPOPS2 FmForm*/ U1, 39, 40, 40, /* FDIVm =161; ! FPOPS2 FmForm*/ U1, 39, 40, 40, /* FDIVP =162; ! FPOPS2 F2Form*/ U1, 39, 40, 40, /* FDIV =163; ! FPOPS2 F2Form*/ U1, 39, 40, 40, /* FIDIVRm =164; ! FPOPS2 FmForm*/ U1, 42, 43, 43, /* FDIVRd =165; ! FPOPS2 FmForm*/ U1, 39, 40, 40, /* FDIVRm =166; ! FPOPS2 FmForm*/ U1, 39, 40, 40, /* FDIVRP =167; ! FPOPS2 F2Form*/ U1, 39, 40, 40, /* FDIVR =168; ! FPOPS2 F2Form*/ U1, 39, 40, 40, /* FICOMm =169; ! FPCOMPARE FmForm*/ U1, 4, 8, 8, /* FICOMPm =170; ! FPCOMPARE FmForm*/ U1, 4, 8, 8, /* FCOMd =171; ! FPCOMPARE FmForm*/ U1, 1, 4, 4, /* FCOMm =172; ! FPCOMPARE FmForm*/ U1, 1, 4, 4, /* FCOM =173; ! FPCOMPARE F2Form*/ U1, 1, 4, 4, /* FCOMPd =174; ! FPCOMPARE FmForm*/ U1, 1, 4, 4, 0,0,0,0, /* FCOMPm =176; ! FPCOMPARE FmForm*/ U1, 1, 4, 4, /* FCOMP =177; ! FPCOMPARE F2pForm*/ U1, 1, 4, 4, /* FCOMPP =178; ! FPCOMPARE F2ppForm*/ U1, 1, 4, 4, /* FLDCW =179; ! SPECREGrw X2iForm*/ U1, 7, 7, 7, /* FSTCW =180; ! SPECREGrw X2iForm*/ U1, 2, 2, 2, /* FSTSW =181; ! SPECREGrw X2iForm*/ U1, 2, 2, 2, /* FTST =182; ! FPCOMPARE F1Form*/ U1, 2, 2, 2, /* FCHS =183; ! FPOPS1 F1Form*/ U1, 1, 1, 1, /* FLDZ =184; ! FPOPS1 F1Form*/ U1, 2, 2, 2, /* FLD1 =185; ! FPOPS1 F1Form*/ U1, 3, 5, 5, /* FLDL2E =186; ! FPOPS1 F1Form*/ U1, 3, 5, 5, /* FLDLN2 =187; ! FPOPS1 F1Form*/ U1, 3, 5, 5, /* FLDLG2 =188; ! FPOPS1 F1Form*/ U1, 3, 5, 5, /* FLDPI =189; ! FPOPS1 F1Form*/ U1, 3, 5, 5, /* FABS =190; ! FPOPS1 F1Form*/ U1, 1, 1, 1, 0,0,0,0, /* FDECSTP =192; ! SPECREGrw NoForm*/ U1, 1, 1, 1, /* FRNDINT =193; ! FPOPS1 F1Form*/ U1, 9, 10, 10, /* FXCH =194; ! SPECREGrw NoForm*/ U0, 1, 1, 1, /* FSQRT =195; ! FPOPS1 F1Form*/ U1, 30, 31, 31, /* FSIN =196; ! FPOPS1 F1Form*/ U1, 30, 31, 31, /* FCOS =197; ! FPOPS1 F1Form*/ U1, 30, 31, 31, /* FPTAN =198; ! FPOPS1 F2Form*/ U1, 30, 31, 31, /* FPATAN =199; ! FPOPS2 F2pForm*/ U1, 30, 31, 31, /* F2XM1 =200; ! FPOPS1 F1Form*/ U1, 30, 31, 31, /* FYL2X =201; ! FPOPS2 F2pForm*/ U1, 30, 31, 31, /* FPREM =202; ! FPOPS2 F2Form*/ U1, 16, 17, 17, /* FPREM1 =203; ! FPOPS2 F2Form*/ U1, 16, 17, 17, /* FILDd =204; ! FPLOAD F1Form*/ U1, 3, 4, 4, /* FINIT =205; ! SPECREGrw NoForm*/ U1, 16, 17, 17, /* FINCSTP =206; ! SPECREGrw NoForm*/ U1, 1, 1, 1, 0,0,0,0, /* rFADD =208; ! FPOPS2 F2rForm*/ U1, 1, 3, 3, /* rFSUB =209; ! FPOPS2 F2rForm*/ U1, 1, 3, 3, /* rFSUBR =210; ! FPOPS2 F2rForm*/ U1, 1, 3, 3, /* rFMUL =211; ! FPOPS2 F2rForm*/ U1, 2, 4, 4, /* rFDIV =212; ! FPOPS2 F2rForm*/ U1, 39, 40, 40, /* rFDIVR =213; ! FPOPS2 F2rForm*/ U1, 39, 40, 40, /* rFADDP =214; ! FPOPS2 F2rForm*/ U1, 1, 3, 3, /* rFSUBP =215; ! FPOPS2 F2rForm*/ U1, 1, 3, 3, /* rFSUBRP =216; ! FPOPS2 F2rForm*/ U1, 1, 3, 3, /* rFMULP =217; ! FPOPS2 F2rForm*/ U1, 2, 4, 4, /* rFDIVP =218; ! FPOPS2 F2rForm*/ U1, 39, 40, 40, /* rFDIVRP =219, ! FPOPS2 F2rForm*/ U1, 39, 40, 40, /* FISTdP 220; ! FPSTORE F2pForm*/ U1, 6, 6, 6, /* FLDq =221; ! FPLOAD F1Form*/ U1, 3, 3, 3, /* FSTPq =222; ! FPSTORE F2pForm*/ U1, 3, 3, 3, /* FCMOVcc =239-46; ! FPOPS2 F2Form */ U1, 1, 1, 1, /* FCMOVcc =239-46; ! FPOPS2 F2Form */ U1, 1, 1, 1, /* FCMOVcc =239-46; ! FPOPS2 F2Form */ U1, 1, 1, 1, /* FCMOVcc =239-46; ! FPOPS2 F2Form */ U1, 1, 1, 1, /* FCMOVcc =239-46; ! FPOPS2 F2Form */ U1, 1, 1, 1, /* FCMOVcc =239-46; ! FPOPS2 F2Form */ U1, 1, 1, 1, /* FCMOVcc =239-46; ! FPOPS2 F2Form */ U1, 1, 1, 1, /* FCMOVcc =239-46; ! FPOPS2 F2Form */ U1, 1, 1, 1, /* FCOMI =247; ! FPOPS2 F2Form */ U1, 1, 1, 2, /* FUCOMI =248; ! FPOPS2 F2Form */ U1, 1, 1, 2, /* FCOMIP =249; ! FPOPS2 F2pForm */ U1, 1, 1, 2, /* FUCOMIP =250; ! FPOPS2 F2pForm */ U1, 1, 1, 2 }; /************************** end of p5sched.inc *********************************/ /***/ /* end of automatic translation */